Path: utzoo!utgpu!news-server.csri.toronto.edu!rutgers!uwm.edu!rpi!zaphod.mps.ohio-state.edu!usc!apple!agate!darkstar!saturn.ucsc.edu!turing From: turing@saturn.ucsc.edu (Brad Gulko) Newsgroups: comp.sys.next Subject: Parity memory and speed Message-ID: <9887@darkstar.ucsc.edu> Date: 8 Dec 90 19:27:50 GMT References: <1990Dec07.215637.22618@ecst.csuchico.edu> Sender: usenet@darkstar.ucsc.edu Organization: University of California, Santa Cruz Lines: 10 Is there any truth to the rumor that using parity memory (9 bit simms) in the next introduces additional wait states into the bus timing? If true, how much does this actually effect system performance? Finally, does anyone out ther factually know how the NeXT handles a parity error? Does it lock up? crash? bring up a requestor? etc... -- Brad