Newsgroups: comp.arch
Path: utzoo!henry
From: henry@zoo.toronto.edu (Henry Spencer)
Subject: Re: The Future of Buses (and Futurebus)
Message-ID: <1990Dec10.185346.4114@zoo.toronto.edu>
Organization: U of Toronto Zoology
References: <36734@cup.portal.com> <AGLEW.90Dec9184818@lasso.crhc.uiuc.edu>
Date: Mon, 10 Dec 90 18:53:46 GMT

In article <AGLEW.90Dec9184818@lasso.crhc.uiuc.edu> aglew@crhc.uiuc.edu (Andy Glew) writes:
>... The processor to memory connection is too important to be
>left a standard bus, especially a standard bus that is as featureful
>as FUTUREbus.

This last deserves further attention, I think.  My belief is that buses
have hit about the point that processor architectures were at a decade or
so ago:  drowning in their own useless complexity.  FUTUREbus is the
Intel 432 of buses.  I eagerly await the RISC revolution.
-- 
"The average pointer, statistically,    |Henry Spencer at U of Toronto Zoology
points somewhere in X." -Hugh Redelmeier| henry@zoo.toronto.edu   utzoo!henry