Path: utzoo!attcan!uunet!snorkelwacker.mit.edu!bu.edu!att!bellcore!messy!mo
From: mo@messy.bellcore.com (Michael O'Dell)
Newsgroups: comp.arch
Subject: Re: The Future of Buses (and Futurebus) and the Cray YMP
Message-ID: <1990Dec13.153204.3294@bellcore.bellcore.com>
Date: 13 Dec 90 15:32:04 GMT
References: <36734@cup.portal.com> <AGLEW.90Dec9184818@lasso.crhc.uiuc.edu> <1178@shakti.ncst.ernet.in>
Sender: usenet@bellcore.bellcore.com (Poster of News)
Reply-To: mo@messy.UUCP (Michael O'Dell)
Organization: Center for Chaotic Repeatabilty
Lines: 6

Very fast computers don't have busses.  They do everything the
hard way: very fast point-to-point interconnects.

Yes, the multiport memory controller on such machine is *quite* complex.

	-Mike