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From: rst@cs.hull.ac.uk (Rob Turner)
Newsgroups: comp.arch
Subject: Re: RISCizing a CISC processor
Message-ID: <11114.9012131726@olympus.cs.hull.ac.uk>
Date: 13 Dec 90 17:26:55 GMT
Sender: daemon@ucbvax.BERKELEY.EDU
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I first heard about this technique a few years ago when I was reading
the documentation for the Clipper microprocessor. From what I can
remember, the designers did *exactly* the thing you describe.

Rob