Path: utzoo!attcan!uunet!jarthur!usc!zaphod.mps.ohio-state.edu!wuarchive!rex!uflorida!gatech!psuvax1!psuvm!dxb132
From: DXB132@psuvm.psu.edu
Newsgroups: comp.periphs.scsi
Subject: Any 5380 gurus out there?
Message-ID: <90339.210133DXB132@psuvm.psu.edu>
Date: 6 Dec 90 02:01:33 GMT
Organization: Penn State University
Lines: 18

A friend of mine is writing a driver for the NCR 5380 chip. It's connected in
a very simple way, with essentially no hardware support (similar to most Macs).
The read/write loop looks like this:

wait for DRQ to be asserted
move.b ..
move.b ..  <- 128 of these
move.b ..
...
loop back to DRQ wait

The problem is that sometimes it screws up (for lack of a better description).
It seems to mess up only on writes. If, however, the wait-for-DRQ is replaced
with a delay loop, everything works perfectly.

Any ideas?

-- Dan Babcock