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From: andrew@frip.WV.TEK.COM (Andrew Klossner)
Newsgroups: comp.sys.m88k
Subject: Re: m88200 cache flushes on DG Aviion
Message-ID: <9704@orca.wv.tek.com>
Date: 12 Dec 90 17:47:47 GMT
References: <2308@io.UUCP> <1199@dg.dg.com> <4322@photon.oakhill.UUCP>
Sender: news@orca.wv.tek.com
Reply-To: andrew@frip.wv.tek.com
Organization: Tektronix, Wilsonville, Oregon
Lines: 17

[]

	"Using memctl() is the only way to insure that the code will
	be portable at all ... In fact it may even be fairly efficient
	since the 88200 can flush or invalidate a line at a time."

In the Motorola kernel, the memctl implementation is moby inefficient.
It has to be, because there's no memctl option that says "just flush
cache"; instead, the code must run through segment and page descriptors
flipping the writable state.

This was enough of a problem that Tektronix implemented a "just flush
the cache" system call in our kernel, for a customer who did
incremental compilation and didn't need to be BCS compliant.

  -=- Andrew Klossner   (uunet!tektronix!frip.WV.TEK!andrew)    [UUCP]
                        (andrew%frip.wv.tek.com@relay.cs.net)   [ARPA]