Path: utzoo!mnetor!tmsoft!torsqnt!news-server.csri.toronto.edu!cs.utexas.edu!sdd.hp.com!elroy.jpl.nasa.gov!ames!uakari.primate.wisc.edu!crdgw1!crdos1!davidsen From: davidsen@crdos1.crd.ge.COM (Wm E Davidsen Jr) Newsgroups: comp.arch Subject: Re: Let's pretend Keywords: Intel, 586, windows Message-ID: <3058@crdos1.crd.ge.COM> Date: 18 Dec 90 19:46:34 GMT References: <3042@crdos1.crd.ge.COM> <1990Dec18.082623.16648@kithrup.COM> Reply-To: davidsen@crdos1.crd.ge.com (bill davidsen) Organization: GE Corp R&D Center, Schenectady NY Lines: 27 In article <1990Dec18.082623.16648@kithrup.COM> sef@kithrup.COM (Sean Eric Fagan) writes: | While I don't know that it would reduce chip count, a Good Thing to have | would be: MORE REGISTERS!!!!!! I think we can assume that the 586 will be a superset of the 486. Can someone quantify what would be gained with more registers, say R0-R7? The cost of saving and restoring on procedure calls is obvious, can someone show that the addition of more would produce a significant net gain. Now if you said make the existing registers more general purpose, I can see that, although the beauty of the Intel instruction set is that by having most of the instructions single byte the memory bandwidth is conserved for data access. The price is that you have special purpose registers. | But, of course, it won't happen. *sigh* Registers were added with the 286 and 386. I have yet to see a compiler which makes use of the 386 registers. I hope people will contribute idea of useful additions, rather than talk about how Intel can be more like {your favorite chip or style}. -- bill davidsen (davidsen@crdos1.crd.GE.COM -or- uunet!crdgw1!crdos1!davidsen) VMS is a text-only adventure game. If you win you can use unix.