Path: utzoo!censor!geac!torsqnt!news-server.csri.toronto.edu!cs.utexas.edu!usc!csun!kithrup!sef
From: sef@kithrup.COM (Sean Eric Fagan)
Newsgroups: comp.arch
Subject: Re: Let's pretend
Keywords: Intel, 586, windows
Message-ID: <1990Dec19.052338.3911@kithrup.COM>
Date: 19 Dec 90 05:23:38 GMT
References: <3042@crdos1.crd.ge.COM> <1990Dec18.082623.16648@kithrup.COM> <3058@crdos1.crd.ge.COM>
Organization: Kithrup Enterprises, Ltd.
Lines: 23

In article <3058@crdos1.crd.ge.COM> davidsen@crdos1.crd.ge.com (bill davidsen) writes:
>  I think we can assume that the 586 will be a superset of the 486. Can
>someone quantify what would be gained with more registers, say R0-R7?

Yep.  Optimization.  Take a look at code produced by either gcc or msc for
the '386 some time.  Ever hear of the message, "infinite spill"?

>  Registers were added with the 286 and 386. I have yet to see a
>compiler which makes use of the 386 registers.

The registers visible to ring three applications for the '386 were fs and fs
(making a total of six segment registers, to match the six "gp" registers).
And I've seen code use it.  Remember that a) they're only 16 bits, and b) in
protected mode, loading a segment register with an invalid segment number
will cause a fault.  I had a version of a compiler that used fs for doing
certain weird things (like jumping from a 32-bit segment to a 16-bit
segment *shudder*).

-- 
Sean Eric Fagan  | "I made the universe, but please don't blame me for it;
sef@kithrup.COM  |  I had a bellyache at the time."
-----------------+           -- The Turtle (Stephen King, _It_)
Any opinions expressed are my own, and generally unpopular with others.