Path: utzoo!attcan!utgpu!news-server.csri.toronto.edu!cs.utexas.edu!swrinde!zaphod.mps.ohio-state.edu!usc!csun!kithrup!sef
From: sef@kithrup.COM (Sean Eric Fagan)
Newsgroups: comp.arch
Subject: Re: Let's pretend
Keywords: Intel, 586, windows
Message-ID: <1990Dec19.222932.1446@kithrup.COM>
Date: 19 Dec 90 22:29:32 GMT
References: <3058@crdos1.crd.ge.COM> <1990Dec19.052338.3911@kithrup.COM> <1990Dec19.143749.3216@ux1.cso.uiuc.edu>
Organization: Kithrup Enterprises, Ltd.
Lines: 62

In article <1990Dec19.143749.3216@ux1.cso.uiuc.edu> mcdonald@aries.scs.uiuc.edu (Doug McDonald) writes:
>Yes, in some person's sense. But maybe not speed. 

Give me a break.  Go read some papers on compiler design, in particular
optimization.  If you have more registers, you can cut down accesses to
memory, which is *slow*.

>IF you add more registers
>you have to add instructions to access them. The register addressing 
>system, of the 386 is already quite full. 

No shit.

>Those of you who want more
>registers, please explain here on the net exactly what the op-codes you
>are going to use to acces those registers. Are you goint to add a byte-
>prefix to every register instruction that says "use the special new
>register set"? If so, please explain how that would speed execution.
>Please remember that any operand that would be put in a register would be in
>the cache anyway. 

That last statement is *not* necessarily true.

Second of all, I never said that it would be easy or possible to add more
registers, only desirable to have more registers.  Are you so fond of code
like

	mov	eax, DWORD PTR [ebx+ecx*8+1234]

and then, three instructions later,

	mov	DWORD PTR [esp+12], eax
	mov	eax, DWORD PTR [...]
	/* another two or three instructions */
	mov	eax, DWORD PTR [esp+12]

Do you *really* understand what this is going to cost you in terms of
performance?

>Only once have I needed more registers than the 80286 already has. 

How nice for you.  Now go compile some code, and get a disassembly.  Note
all the memory references, because the compiler had to use them when it
would have been nicer to have some extra registers.  Count all the spills to
memory.  Add up all those extra cycles.  Fun, isn't it?  It's *so* amazing
how much faster a chip can be when it has to do a 32-bit data access every
instruction!

>I think a FAR better idea than squeezing in more registers would be
>to take advantage of the fact that the 80x86 was designed from the start
>to have an efficient instruction set, leave it that way, and simply use
>the chip space to make **everything** faster. 

The instruction set was designed to be efficient in a different era.  Now,
it's not so efficient.  Why do you think that RISC chips, or even 68k's, are
getting such higher performance?

-- 
Sean Eric Fagan  | "I made the universe, but please don't blame me for it;
sef@kithrup.COM  |  I had a bellyache at the time."
-----------------+           -- The Turtle (Stephen King, _It_)
Any opinions expressed are my own, and generally unpopular with others.