Path: utzoo!utgpu!news-server.csri.toronto.edu!rutgers!ucsd!hub.ucsb.edu!tom From: tom@bears.ucsb.edu (Tom Weinstein) Newsgroups: comp.arch Subject: Re: more register flames Message-ID: <7890@hub.ucsb.edu> Date: 20 Dec 90 18:38:30 GMT References: <441@inetg1.arco.com> Sender: news@hub.ucsb.edu Reply-To: tom@bears.ucsb.edu Distribution: usa Organization: Silicon Graphics Inc. Lines: 18 In-reply-to: dprrhb@inetg1.Arco.Com's message of 20 Dec 90 15:37:53 GMT In article <441@inetg1.arco.com>, dprrhb@inetg1.Arco.Com (Reginald H. Beardsley) writes: > With respect to all the argument about having large numbers of registers in > hardware, do any of you read anything more substantial than net news? > From "Computer Architecture, A Quantative Approach" by J.L Hennessy and > D.A. Patterson, p. E-15: > "an implementation of SPARC can have as few a 40 physical registers > and as many as 520, although most have 128 to 136, so far" Ack. This is so completely out of context that I have to say something. This is taken right out of the middle of a discussion of register windows. All this really says is that SPARC can have a variable number of register windows, each 32 registers wide. -- He is Bob...eager for fun. | Tom Weinstein tom@bears.ucsb.edu He wears a smile... Everybody run! | tweinst@polyslo.calpoly.edu