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From: jps@dworkin.wustl.edu (James Sterbenz)
Newsgroups: comp.arch
Subject: Re: The Future of Buses (and Futurebus)
Message-ID: <2717@olympus.wustl.edu>
Date: 22 Dec 90 03:44:32 GMT
References: <36734@cup.portal.com> <1990Dec12.022537.17461@news.arc.nasa.gov> <1200@shakti.ncst.ernet.in>
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In article <1200@shakti.ncst.ernet.in> shri@ncst.ernet.in (H.Shrikumar ) writes:
>In article <1990Dec12.022537.17461@news.arc.nasa.gov> 
> lamaster@pioneer.arc.nasa.gov (Hugh LaMaster) writes:
>>I think that there is a world of high speed memory interconnection schemes
>>dating back 25 years, anyway, that seems to be ignored by the bus-oriented
>>micro industry.  Buses like Futurebus really seem to be the hard way to
>>build CPU-memory connections.  I expect to see a rediscovery of memory
>>interconnection ideas in the next decade as people struggle to take advantage
>>of massively parallel architectures.

>   Just a few days ago, the same question occured to me too, when
>Prof Handler of IMMD (the German institute that works on MIMD
>(interesting name for the inst :-) parallelism) was with us. He gave a
>talk outlining some of their work, including the EGPA (Extensible (?)
>general purpose array), and its extensions.

Unfortunately, it seems as though much of the research community is 
doing Unix on micros using busses, and has forgotten much of the
architecture and operating systems work from as far back as the mid-60's.
As micros grow up to be as powerful as mainframes and supercomputers
used to be, and as Unix has to grow up to be a real operating system,
it makes sense to look at some of the problems that have long been
solved and implemented.

I'm already putting on the Asbestos suit...

--
James Sterbenz  Computer and Communications Research Center
                Washington University in St. Louis   +1 314 726 4203
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