Path: utzoo!utgpu!news-server.csri.toronto.edu!cs.utexas.edu!samsung!uunet!mcsun!ukc!edcastle!as
From: as@castle.ed.ac.uk (A Stevens)
Newsgroups: comp.sys.acorn
Subject: Re: ARM-4
Message-ID: <7673@castle.ed.ac.uk>
Date: 28 Dec 90 09:46:59 GMT
Sender: as@castle.ed.ac.uk
Organization: Edinburgh University Computing Service
Lines: 27

From: A Stevens <as>
Subject: Re: ARM4
To: kvj@rhi.hi.is (Kristjan Valur Jonsson)
In-Reply-To: Kristjan Valur Jonsson's message of 27 Dec 90 15:11:32 GMT
Cc: 

In reply to Kristjan's query as to what ways an ARM-3 might be 
improved upon...

(1)  (The biggy for me) A *MUCH* Bigger, *MUCH* Smarter (i.e. multi-way
     set-associative, ...) cache.  This would be a huge win on the kind
     of single-user, low memory band-width machines we all know and love...
	e.g. My A440 in  a 256 colour screen mode.

     The current cache is a wee bit too small and dumb to really bite
     in situations like running TeX and the like.

(2)  A good FPU - this would make the ARM much more competitive running
     UNIX and make those ray-tracing demos sooo much faster!

(3)  Tweaks to allow data, if not program, addresses to go beyond the current
     32M or whatever.

(4)  Hardware integer mul and div.


	Andrew