Path: utzoo!utgpu!news-server.csri.toronto.edu!cs.utexas.edu!sdd.hp.com!mips!news.cs.indiana.edu!news.nd.edu!bach!treesh From: treesh@bach.helios.nd.edu Newsgroups: comp.sys.cbm Subject: Re: RAM upgrade question Message-ID: <1990Dec28.233908.6431@news.nd.edu> Date: 28 Dec 90 23:39:08 GMT References: <90357.215753XWUU@PURCCVM.BITNET> Sender: news@news.nd.edu (USENET News System) Organization: University of Notre Dame, Notre Dame Lines: 12 DISCLAIMER: Im speaking on strictly a theory, not from acutaly expirence with high memory REU's. The piggy backing of the ram chips makes sence, but there should be one pin that you do not piggy back, this will proabaly be the CS line. This line is whats used to select this chip durring memrory mutliplexing. As for the chips being TALL, they are proabaly replaced with 1 MEG DRAM chips, and in the 2 meg configuration, they are then 1 MEG piggy-backed. ctfm