Path: utzoo!attcan!utgpu!news-server.csri.toronto.edu!cs.utexas.edu!usc!elroy.jpl.nasa.gov!ncar!stout.atd.ucar.edu!cook From: cook@stout.atd.ucar.edu (Forrest Cook) Newsgroups: sci.electronics Subject: Re: Radio Electronics Descrambler Message-ID: <9633@ncar.ucar.edu> Date: 21 Dec 90 06:32:45 GMT References: <1990Dec17.184710.28481@csn.org> <1990Dec18.224950.7142@usenet@scion.CS.ORST.EDU> <1990Dec19.112229.1@bunyip.enet.dec.com> Sender: news@ncar.ucar.edu Organization: Atmospheric Technology Division/NCAR, Boulder, CO Lines: 23 In article <1990Dec19.112229.1@bunyip.enet.dec.com> quodling@bunyip.enet.dec.com writes: >In article <1990Dec18.224950.7142@usenet@scion.CS.ORST.EDU>, harrist@jacobs.CS.ORST.EDU (Tim Harris) writes: >> In article <1990Dec17.184710.28481@csn.org> tomf@boulder.Colorado.EDU writes: ... >> the one who really knows what he's doing). My brother poked >> around the board with his finger and BAM, it locked up and was >I would say that either you have a bad solder joint and his poking nudged it This sounds to me like the PLL is free running above or below it's maximum capture frequency. Try tweaking the frequency determining components of the PLL VCO circuit for starters. Compare the VCO frequency in the unlocked and locked states to determine which way to go. This requires a scope or counter of course. If you don't have such tools, you can always try guessing :-) -- ^ ^ Forrest Cook - <<< Weirdness is Relative! >>> /|\ /|\ cook@stout.atd.ucar.edu WB0RIO (This posting is my OPINION) /|\ /|\ {husc6|rutgers|ames|gatech}!ncar!stout!cook