Path: utzoo!utgpu!news-server.csri.toronto.edu!cs.utexas.edu!tut.cis.ohio-state.edu!pt.cs.cmu.edu!sei!firth From: firth@sei.cmu.edu (Robert Firth) Newsgroups: comp.arch Subject: Re: more registers for ix86, was: Let's pretend Message-ID: <9854@as0c.sei.cmu.edu> Date: 4 Jan 91 13:23:34 GMT References: <3042@crdos1.crd.ge.COM> <1990Dec26.020034.4131@lpi.liant.com> <5827@labtam.labtam.oz> Reply-To: firth@sei.cmu.edu (Robert Firth) Organization: Software Engineering Institute, Pittsburgh, PA Lines: 25 In article kenw@skyler.calarc.ARC.AB.CA (Ken Wallewein) writes: > Seriously, though, I remember reading the docs for processor in the >Texas Instruments 99/4A. As I recall, it had three registers: a >couple for operands, and one pointer register for a "virtual" register >set in RAM. Changing that one register's contents gave one a whole or >partially different set. The docs claimed (of course) that this was the >way of the future, because processor <-> memory bandwidths were >increasing (hah :-). From my (rather large) library of computer manuals: "2.1.4 Workspace Concept The 990 register fileis located in memory. This imposes very little speed penalty because the 990 computers use fast semiconductor memory. The classifications "hardware register" and "memory" are arbitrary when both are semiconductor devices." [Texas Instruments: 990 Computer Family Systems Handbook, 1976] Ah, but how else could you build a machine with a 250ns cycle time that did a full context switch in less than 10us? False premise, maybe, but great engineering.