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From: rtrauben@cortex.Eng.Sun.COM (Richard Trauben)
Newsgroups: comp.arch
Subject: Re: Number of registers
Message-ID: <5336@exodus.Eng.Sun.COM>
Date: 6 Jan 91 08:27:10 GMT
References: zillions
Sender: news@exodus.Eng.Sun.COM
Organization: Sun Microsystems, Mt. View, Ca.
Lines: 9

If Intel really wanted to compensate for the limited number of 
registers which force local operands to spill out to the stack
in memory, they could always add a small on-chip multi-port stack
cache (ala' CRISP) without breaking the ISA. I'm sure that they
have already studied this and come to their own conclusions. 
Contrary to popular belief, folks who actually do the work do
read conference proceedings papers.....

-richard