Path: utzoo!utgpu!news-server.csri.toronto.edu!cs.utexas.edu!usc!apple!baum
From: baum@Apple.COM (Allen J. Baum)
Newsgroups: comp.arch
Subject: Re: more registers for ix86
Message-ID: <47823@apple.Apple.COM>
Date: 7 Jan 91 20:13:29 GMT
References: <47713@apple.Apple.COM> <5833@labtam.labtam.oz> <47822@apple.Apple.COM>
Reply-To: baum@apple.UUCP (Allen Baum)
Organization: Apple Computer, Inc.
Lines: 17

[]
What I said was:

>What I was arguing was that cache is not a substitute for more regs., although
>marketing benchmarks and numbers might make it appear so.

I thought I'd better add a caveat: More registers up to some limit.
I'm not sure where the limit is, and that limit changes with compiler
technology.  Right now, it seems to be (very roughly) around 32- I'm
willing to be corrected. At some point, better register allocation
algorithms might push that higher. It is a bit of a chicken & egg
problem.


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