Path: utzoo!utgpu!news-server.csri.toronto.edu!cs.utexas.edu!rice!news
From: preston@ariel.rice.edu (Preston Briggs)
Newsgroups: comp.arch
Subject: Re: more registers for ix86
Message-ID: <1991Jan7.212839.27888@rice.edu>
Date: 7 Jan 91 21:28:39 GMT
References: <5833@labtam.labtam.oz> <47822@apple.Apple.COM> <47823@apple.Apple.COM>
Sender: news@rice.edu (News)
Organization: Rice University, Houston
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In article <47823@apple.Apple.COM> baum@apple.UUCP (Allen Baum) writes:
>
>I thought I'd better add a caveat: More registers up to some limit.
>I'm not sure where the limit is, and that limit changes with compiler
>technology.  Right now, it seems to be (very roughly) around 32- I'm
>willing to be corrected. At some point, better register allocation
>algorithms might push that higher.

I think this is mostly correct.  However, I'd say that improved
optimization tends to increase the number of registers required.
Better register allocation tends to reduce the number of registers
required.

Again, we need caveats.  Sloppy strength reduction can require more
registers than careful strength reduction.  Good constant propagation
and dead code elimination require less registers.

There are also other limits.  For floating-point code,
there no improvement to be had once the FPU is 100% busy.
On many machines and many problems, it doesn't take too
many registers to achieve this goal.

Preston Briggs