Path: utzoo!utgpu!news-server.csri.toronto.edu!cs.utexas.edu!uunet!auspex!guy
From: guy@auspex.auspex.com (Guy Harris)
Newsgroups: comp.arch
Subject: Re: machines with some loadable microcode are easier to fix
Message-ID: <5083@auspex.auspex.com>
Date: 7 Jan 91 21:49:16 GMT
References: <71537@bu.edu.bu.edu> <1991Jan6.033536.14108@zoo.toronto.edu>
Organization: Auspex Systems, Santa Clara
Lines: 17

>>A few months ago I posted to a couple news groups (not this one) a
>>program that crashed all RISC machines that it had been tried on,
>>but not the VAX and 68020 machines that I had tried it on. 
>
>In case you didn't notice, it crashed some other CISCs and failed to crash
>a number of RISCs when people tried it out more widely.

And on at least one of the RISCs where it crashed (some MIPS-based
machine), the bug was in the *operating system*, not in the chip - some
code in the OS didn't properly handle an illegal instrution in the delay
slot of an illegal conditional branch, or something like that.  I suspect
the problem on SPARC machines is also an OS bug, probably in the
floating-point emulation code.

(That code could perhaps be considered equivalent to microcode on some
CISCs; if so, one might consider it to argue in favor of loadable
microcode on machines that have microcode, I suppose.)