Path: utzoo!utgpu!news-server.csri.toronto.edu!bonnie.concordia.ca!uunet!crdgw1!crdos1!davidsen
From: davidsen@crdos1.crd.ge.COM (Wm E Davidsen Jr)
Newsgroups: comp.arch
Subject: Re: lots of processors on single RAM
Message-ID: <3107@crdos1.crd.ge.COM>
Date: 9 Jan 91 19:25:09 GMT
References: <4609@ruuinf.cs.ruu.nl>
Reply-To: davidsen@crdos1.crd.ge.com (bill davidsen)
Organization: GE Corp R&D Center, Schenectady NY
Lines: 13

In article <4609@ruuinf.cs.ruu.nl> clldomps@cs.ruu.nl (Louis van Dompselaar) writes:
| I'm working on a way to connect at least 9 z80B-6 MHz chips
| on a single lots-of-MByte dynamic RAM.

  One approach is to use a memory controller which behaves like a
multiport memory. This allows the physical to be cheap single ported
memory, and the cache to be on the memory controller, thus avoiding the
problems of cache consistency.

  Obviously a more traditional bus and per-cpu cache can be done as well.
-- 
bill davidsen	(davidsen@crdos1.crd.GE.COM -or- uunet!crdgw1!crdos1!davidsen)
    VMS is a text-only adventure game. If you win you can use unix.