Path: utzoo!utgpu!cunews!bnrgate!uunet!mcsun!ukc!edcastle!aipna!aipna.ed.ac.uk!as
From: as@aipna.ed.ac.uk
Newsgroups: comp.sys.acorn,eunet.micro.acorn
Subject: BBC micro + the 6809 (was: MODE-21 ...)
Message-ID: <3802@aipna.ed.ac.uk>
Date: 8 Jan 91 10:33:26 GMT
Sender: news@aipna.ed.ac.uk
Reply-To: as@aipna.ed.ac.uk ()
Organization: Dept of AI, Edinburgh, UK
Lines: 33

> Is this true?  I'm not sure how you define Interrupt Latency
> ... the literature ... tells me that...
>    Fast IRQ takes 12 cycles and RTI from it takes 6 cycles.
>    NMI or IRQ takes 21 cycles and RTI from it takes 15 cycles.
>    SWI takes 19 cycles and RTI from it takes 15 cycles.
>    SWI2 and SWI3 take 20 cycles and RTI from them takes 15 cycles.

Yep, I think these are the figures, I made a similar point to the Acorn
eng., but he seemed pretty adamant about it.  Ditto other Acorn
types I came across and winged at at the time.

I personally think the reasons for going with the 6502 were more
socio-political than well-reasoned out.  I.e. 6502's were cheap, and
Acorn's programmers were mainly 6502 assembler junkies.  Once they'd
made their minds up I'm sure all kinds of good reasons could be found
why the 6809 couldn't hack it.  Their other rather questionable decision
taste-wise wise was that weird infatuation with BCPL... (Built in
Cambridge Programming Language as the wags would have it).

> (GWP - Gods Wonderful Processor)

Wasn't it just - think how nice stuff like paged ROMs etc could have worked
with a changeable base page and 16 bit indexed modes.  I daren't think of
a system with OS/9 and the 6809 MMU.  I guess after they spent all
the board real estate on speech processors, teletext support,
silly tube connector etc, there wasn't much budget left for the CPU.


--
Andrew Stevens,                     JANET: as@uk.ac.ed.aipna
Dept. of Artificial Intelligence,   ARPA: as@aipna.ed.ac.uk
80 South Bridge,                    UUCP:  ...!mcvax!ukc!aipna!as
Edinburgh University, EDINBURGH