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From: lkoop@pnet01.cts.com (Lamonte Koop)
Newsgroups: comp.sys.amiga.hardware
Subject: Accelerator oddness
Message-ID: <6838@crash.cts.com>
Date: 11 Jan 91 02:16:01 GMT
Sender: root@crash.cts.com
Organization: People-Net [pnet01], El Cajon CA
Lines: 26

Here's an odd peculiarity of the CSA Mega-Midget Racer '030 board I have 
come across that I hope someone may have an idea about before I'm forced to
pull the beast apart bit by bit to examine it.  The MMR is a full '030
accelerator (this one is at 25MHz) with 32-bit RAM [512K SRAM for ROM
translation, 2 megs DRAM (80ns for both) currently installed.  What I have
found is this:  Under normal circumstances, the MMR does a ROM translation
WITHOUT the 030 MMU, using custom hardware.  Now, running a WritePixel (draw a
box a pixel at a time, etc...) time test shows the board running about 40%
slower than an A2630...this is with the ROM image in the 80ns SRAM.  Ditto
performance for doing a normal SetCPU MMU translation to the DRAM.  Something
here is not kosher. [Especially in the light of running the ROM image out of
the SRAM].  Here's one more:  Running the test with the Data cache turned OFF
actually speeds the test up (odd).  A modification was done to the board
earlier to correct a timing problem with the system, but I don't see where it
could have induced this bizarre behavior.  I don't wish to pull the board
apart, but curiosity is quickly getting the best of me, so if ANYONE (Dave ?)
has even the slightest idea what is going on with the beast, I'd appreciate a
line. 


                             LaMonte Koop
 Internet: lkoop@pnet01.cts.com         ARPA: crash!pnet01!lkoop@nosc.mil
           UUCP: {hplabs!hp-sdd ucsd nosc}!crash!pnet01!lkoop
  A scientist is one who finds interest in the kinetic energy of Jell-O
   moving at ridiculous velocities...an engineer is one who can find a
               real-life application for such silliness.