Newsgroups: comp.arch
Path: utzoo!henry
From: henry@zoo.toronto.edu (Henry Spencer)
Subject: Re: 68xxx memory addressing
Message-ID: <1991Jan16.215303.10781@zoo.toronto.edu>
Organization: U of Toronto Zoology
References: <1991Jan16.210201.7962@nstn.ns.ca>
Date: Wed, 16 Jan 1991 21:53:03 GMT

In article <1991Jan16.210201.7962@nstn.ns.ca> maceache@fox.nstn.ns.ca (Tim Maceachern) writes:
>Why not have a tagged jump instruction in the 68000 set.  It would take
>the top 4 bits of the address register (or memory value) and use it as 
>an indexed jump into the next 16 memory locations, each of which would
>be a jump to a subroutine or such...

If I'm not mistaken, you can do this in three instructions already, two
if you don't need to make a copy of the "tagged address":  a shift and
a jump using one of the fancy indexed modes.  Given a sexy implementation
like the 68040, this may not be any slower than a custom-cooked instruction,
and it's more flexible.

Actually, it may be better to fetch an address from a table and then
do a jump-indirect on that, rather than branching into a jump table, because
then you incur only one pipeline break rather than two.  This is getting
more and more significant.
-- 
If the Space Shuttle was the answer,   | Henry Spencer at U of Toronto Zoology
what was the question?                 |  henry@zoo.toronto.edu   utzoo!henry