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From: hutch@fps.com (Jim Hutchison)
Newsgroups: comp.arch
Subject: Controller registers vs. Speculative Execution
Keywords: superscalar I/O
Message-ID: <14829@celit.fps.com>
Date: 16 Jan 91 23:25:28 GMT
Sender: daemon@fps.com
Reply-To: hutch@fps.com (Jim Hutchison)
Organization: FPS Computing
Lines: 15

I've been hearing a bit about new processors which do "speculative execution".
That is execution of branchs based on executing both paths or guessing at
which way the branch will go.  Without addressing the viability of speculative
execution, I am curious about how controller registers are addressed.

If it write a value to a control register on a controller, something may happen.
If it read a control register, something may happen.

What happens with these?  I could make guesses, but I might guess at something
covered in a "non-disclosure" that someone else FPS already knows, so I won't.

--
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Jim Hutchison		{dcdwest,ucbvax}!ucsd!fps!hutch
Disclaimer:  I am not an official spokesman for FPS computing