Path: utzoo!utgpu!news-server.csri.toronto.edu!cs.utexas.edu!samsung!uunet!ns-mx!pyrite.cs.uiowa.edu From: jones@pyrite.cs.uiowa.edu (Douglas W. Jones,201H MLH,3193350740,3193382879) Newsgroups: comp.arch Subject: Re: Electronic weapons -- uP of choice? Message-ID: <3969@ns-mx.uiowa.edu> Date: 17 Jan 91 18:56:38 GMT References: <7410002@hpnmdla.HP.COM> Sender: news@ns-mx.uiowa.edu Lines: 25 From article <7410002@hpnmdla.HP.COM>, by roger@hpnmdla.HP.COM (Roger Petersen): > > What is the microprocessor of choice > for smart missiles and bombs? When I was consulting with Rockwell Avionics, they were using their proprietary AAMP processors in many applications (developed as the monolithic version of their proprietary CAP minicomputer). First generation GPS receivers had CAP processors in them, the later generation of Rockwell GPS receivers were supposed to be based on a (yet to be released in 1986) AAMP processor. The CAP/AAMP architecture is one of the best examples of a modern descendant of the Burroughs stack architecture I've ever seen. It's also fast. My 1986 AAMP manual has it doing 200 Whetstones/second when clocked at 20 Mhz using 300 ns memory and dissapating 15 watts. It was one of the first microprocessors I know of to have on-chip floating point hardware. Doug Jones jones@cs.uiowa.edu (Disclaimer: I haven't been associated with Rockwell since 1986, things might have changed since then.)