Path: utzoo!utgpu!news-server.csri.toronto.edu!bonnie.concordia.ca!uunet!cs.utexas.edu!yale!hsdndev!spdcc!ima!cfisun!stardent!wright
From: wright@Stardent.COM (David Wright)
Newsgroups: comp.arch
Subject: Re: Controller registers vs. Speculative Execution
Keywords: superscalar I/O
Message-ID: <1991Jan20.175536.6249@Stardent.COM>
Date: 20 Jan 91 17:55:36 GMT
References: <14829@celit.fps.com>
Organization: Stardent Computer Inc
Lines: 11

In article <14829@celit.fps.com> hutch@fps.com (Jim Hutchison) writes:
>I've been hearing a bit about new processors which do "speculative execution".
>That is execution of branchs based on executing both paths or guessing at
>which way the branch will go.  Without addressing the viability of speculative
>execution...

Is this really a new idea?  I was under the impression that the IBM
360/91 did this.  Or is there some new wrinkle in the recent stuff?

  -- David Wright, not officially representing Stardent Computer Inc
     wright@stardent.com  or  uunet!stardent!wright