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From: lkaplan@bbn.com (Larry Kaplan)
Newsgroups: comp.arch
Subject: Re: 68xxx memory addressing
Keywords: tag 68000
Message-ID: <62249@bbn.BBN.COM>
Date: 22 Jan 91 18:49:25 GMT
References: <1991Jan16.210201.7962@nstn.ns.ca> <45000@mips.mips.COM>
Sender: news@bbn.com
Reply-To: lkaplan@BBN.COM (Larry Kaplan)
Distribution: comp
Organization: Bolt Beranek and Newman Inc., Cambridge MA
Lines: 28

In article <45000@mips.mips.COM> mash@mips.COM (John Mashey) writes:

>Here's a quiz: Q1: during what year would you expect somebody to build & ship
>microprocessor-based systems with 4GB-maximum of physical memory?
>(And without being lunatic-fringe types)
>
>A: looks like 1993, +/- one year.

This is off by about two years, unless, of course, you consider us 
the lunatic-fringe.  ;-)

BBN ACI currently has a TC2000 assembled and running UNIX that has 2Gbytes
of physical memory.  This is done with 128 16-Mbyte nodes, each with an
MC88100.  BBN has all the technology in place to build a TC2000 with close to 
256 16-Mbyte nodes as soon as someone orders one.  This will yield 4 Gbytes of 
physical memory minus about 32 to 64 Mbytes.  The fact that we don't quite
reach a full 4 Gbytes is to leave room for I/O space.

>Of course, 4GB == 32-bits, although various traditional hacks are certainly
>possible to extend this somewhat, although pain mounts quickly.

The pain mounts very quickly as we decide how to handle the 128 Gbytes machines
being proposed with off-the-shelf micros.
_______________________________________________________________________________
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Laurence S. Kaplan		|    \ 0 /    |		BBN Advanced Computers
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(617) 873-2431			  /__/ | \__\		Cambridge, MA  02238