Path: utzoo!utgpu!news-server.csri.toronto.edu!bonnie.concordia.ca!thunder.mcrcim.mcgill.edu!snorkelwacker.mit.edu!bu.edu!rpi!batcomputer!munnari.oz.au!yoyo.aarnet.edu.au!sirius.ucs.adelaide.edu.au!chook.adelaide.edu.au!petera From: petera@chook.adelaide.edu.au (Peter Ashenden) Newsgroups: comp.lang.vhdl Subject: query on linkage and buffer ports Keywords: ports, linkage, buffer Message-ID: <2267@sirius.ucs.adelaide.edu.au> Date: 17 Jan 91 05:56:20 GMT Sender: news@ucs.adelaide.edu.au Reply-To: petera@chook.adelaide.edu.au (Peter Ashenden) Organization: Dept. Computer Science, University of Adelaide Lines: 15 Nntp-Posting-Host: chook.ua.oz.au Just an idle question: Can someone tell me what the purpose of ports of modes linkage and buffer is? They're not really covered in any of the books I've read, the standard doesn't help, and the models I've written haven't suffered from not using them (so far as I know). Curious. Peter A ---------------------------------------------------------------- Peter J. Ashenden Dept. Computer Science, University of Adelaide, South Australia