Path: utzoo!utgpu!news-server.csri.toronto.edu!bonnie.concordia.ca!thunder.mcrcim.mcgill.edu!snorkelwacker.mit.edu!apple!julius.cs.uiuc.edu!wuarchive!rex!ames!ucsd!ucrmath!koufax!rhyde From: rhyde@koufax.ucr.edu (randy hyde) Newsgroups: comp.sys.apple2 Subject: Re: MMu on the IIgs (COP v. BRK) Message-ID: <11204@ucrmath.ucr.edu> Date: 16 Jan 91 17:36:21 GMT References: <278d0eda.563e@petunia.CalPoly.EDU> <91015.000214AABENSON@MTUS5.BITNET> Sender: news@ucrmath.ucr.edu Reply-To: rhyde@koufax.ucr.edu (randy hyde) Lines: 11 >> On the II gs BRK has an operand. This is an artifact of the disassembler. The "operand" for the break instruction goes all the way back to the 6502. The original chip had a bug which pushed the return address of the *next* instruction (rather than next instruction minus one). BRK handlers on the older chips always compensated for this. The GS' disassembler simply treated BRK as a single byte instruction. If you look at all manufacturer's literature, BRK is always listed as a single byte instruction. It was Apple who decided it should be a two-byte instruction. COP, OTOH, is listed in WDC's literature as a two-byte instruction.