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From: mcovingt@athena.cs.uga.edu (Michael A. Covington)
Newsgroups: sci.electronics
Subject: Re: 80386.
Message-ID: <1991Jan16.161646.9446@athena.cs.uga.edu>
Date: 16 Jan 91 16:16:46 GMT
References: <1990Dec18.234020.2491@uoft02.utoledo.edu> <4400001@hpsgwp.sgp.hp.com> <1991Jan14.205104.2829526@locus.com>
Organization: University of Georgia, Athens
Lines: 29

In article <1991Jan14.205104.2829526@locus.com> dana@locus.com (Dana H. Myers) writes:
>
>Since we are assuming the power is disspated in capacitance, we'll
>use the simple form of capacitive reactance:
>...etc...

    Er... Power is not dissipated in capacitance.  No such thing.
    Only resistance can dissipate power.

Here's how CMOS dissipation works.

A CMOS chip dissipates power resistively while transitioning from one
state to the other, and while charging the input capacitance of another
chip. (That's how capacitance got into it... the capacitance does not
dissipate power, but it provides current flow through a resistance.)

The time taken to make a transition, and the time taken to charge an
input capacitance, are constant for any given set of chips.

So is the amount of power dissipated per transition.

Clock frequency is then (proportional to) number of transitions per second.

I would maintain that *both* current *and* power are proportional to
frequency (not the square of frequency). Odd, but plausible once you
realize we are talking about varying the duty cycle, not the voltage
or current.

73 de N4TMI