Path: utzoo!attcan!uunet!tut.cis.ohio-state.edu!ucbvax!pasteur!sprite.berkeley.edu!tve
From: tve@sprite.berkeley.edu (Thorsten von Eicken)
Newsgroups: comp.arch
Subject: Re: How about CACHE based registers, was: more registers for ix86
Message-ID: <10163@pasteur.Berkeley.EDU>
Date: 12 Jan 91 22:46:24 GMT
References: <1991Jan6.014925.10935@zoo.toronto.edu> <47789@apple.Apple.COM> <4300@skye.cs.ed.ac.uk> <47986@apple.Apple.COM> <5820@exodus.Eng.Sun.COM>
Sender: news@pasteur.Berkeley.EDU
Reply-To: tve@sprite.berkeley.edu (Thorsten von Eicken)
Organization: University of California, Berkeley
Lines: 13

In article <5820@exodus.Eng.Sun.COM> rtrauben@cortex.Eng.Sun.COM (Richard Trauben) writes:
>The initial CRISP design made no attempt to keep the stack cache consistent
>with the memory hierarchy. Processes on different CRISP processors in an 
>MP machine that shared a stack were asking for 
>subsequent implementations revised this policy.if 
>-richard 

Huh? You want to share the call stack in an MP? Why that. Isn't the stack
the one area you don't really want to share? Yes, you can pass pointers
to automatic variables around, but then that's the same problem as (not)
putting variables you take the address of into registers.
And which subsequent implementations are you talking of?
	TvE