Path: utzoo!utgpu!news-server.csri.toronto.edu!cs.utexas.edu!sun-barr!lll-winken!elroy.jpl.nasa.gov!sdd.hp.com!uakari.primate.wisc.edu!zaphod.mps.ohio-state.edu!sol.ctr.columbia.edu!ira.uka.de!ifistg!cs3!homeis From: homeis@cs3 Newsgroups: comp.sys.transputer Subject: Re: C004 crossbar communication delays Message-ID: <7207@ifi.informatik.uni-stuttgart.de> Date: 25 Jan 91 18:18:42 GMT Sender: news@ifistg.uucp Organization: IPVR, Univ. Stuttgart, W-Germany Lines: 76 Originator: homeis@cs3 Some people asked me for the old postings, so I send them to the news instead of mailing them idividually. I deleted only irrelevant lines to keep it short. ------- From: braner@batcomputer.tn.cornell.edu (Moshe Braner) Subject: Re: C004 Dynamic Switching Posted: Tue Feb 21 22:50:07 1989 ... One disadvantage of using a 2-layer C004 switching network is that, going through 3 C004's in a row, the data transfer rate on the link is reduced by a half (from about 1.8 MBytes/sec to 0.9). At least that's the case on our Niche board (T800-20s). I have it on good authority that using only 1 or 2 C004s on one link does not have this affect: the acknowledge bits get back just in time. Did anybody try that? Is there any solution for the layered approach (e.g. faster switch-chips)? ... ------------ From: davidb@inmos.co.uk (David Boreham) Subject: C004 does slow down links Posted: Thu Mar 2 20:23:23 1989 ... braner@batcomputer...... writes that he has it on good authority that one and two C004s in a T800--T800 link do not slow down the data-rate. Unfortunately, this is not correct. One C004 slows the link down by about 20%, two devices by about 40%. ... This posting is not to be regarded as INMOS customer support. From: HALLAM@vax1.physics.oxford.ac.uk (P.Hallam-Baker) Subject: Inmos links, the C004 and everything. Date: 8 Mar 89 17:31:03 GMT ... In respones to the recent letter from D.Bareham it is interseting to note that he does not explain why the C004 slows down links. The T.puter data sheet states that the T8 is capable of sending the acknowlege about 5 bit periods after the start of receiving the message. This would suggest that the C004 which introduces a 1.5 bit delay should not slow the link. Unfortunately the link is not able to begin transmission of the next byte until 5 bit cycles after receiving the acknowlege. Appologies to Dave Jefferson of CERN who worked out all this stuff for pre-empting but people seem to need to know ! ... ------- From: davidj@cernvax.UUCP (davidj) (Dave Jeffery) Subject: Re: Inmos links, the C004 and everything. Date: 13 Mar 89 07:38:23 GMT ... We are preparing a paper on Inmos Links which will be presented at the 'Computing in HEP' conference at Oxford in April. However to summarise quickly.... The T8 does not send an ack until 5-6 bit periods after receiving the start bit. And does not send the following datya byte until 5-6 bit periods after receiving an ack. Thus the cable connecting two t8's has to be very short unless you want to drop the data rate. The 5-6 figure arises because of jitter on the signal and clock sync at each end of the link. There are additinal factors due to cable delayt, buffer delay, c004 delay and which direction the wind was blowing when you made the measurements. We have derived a formula which accurately predicts the transfer rate between: t8-t8, t8-t4, t4-t8 and t4-t4 - see the proceedingd of the conference for more details.... The c004 slows down the data transmission as it resync'c the data before forwarding it, the delay is approx 1.9 bit periods at 20 Mbps link speed -------------- Dieter Homeister, Universitaet Stuttgart, Institut fuer parallele und verteilte Hoechstleistungsrechner (IPVR) W7000 Stuttgart 1, Azenbergstr. 12, Tel 0711-121-1342, Germany e-mail homeister@informatik.uni-stuttgart.dbp.de