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From: hgw@rht32.pcs.com (h.-g. willers)
Newsgroups: comp.lang.forth
Subject: TOS in a CPU register
Message-ID: <1134@pcsbst.pcs.com>
Date: 4 Feb 91 16:37:24 GMT
Sender: news@pcsbst.pcs.com
Reply-To: hgw@rht32.pcs.com (h.-g. willers)
Organization: PCS Computer Systeme, GmbH
Lines: 21

Can anyone in the Forth-Comunity domment on the following issue:

Given an indirect threaded FORTH for a RISC-procesor (R3000 or i860).
What is the best implementation (concerning speed) for Top-of-Stack,
i.e.
	TOS not in a CPU register
	TOS in     a CPU register
	TOS and NOS in a CPU register
	TOS and NOS and NOS+1 ....
	......

Having too many stack items in CPU registers generates much shuffling
of data for some stack operations. Which implementation should be
chosen?

    H.-G.

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H.-G. Willers       PCS-Mail: hgw       internal phone ( -271 )
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