Path: utzoo!utgpu!news-server.csri.toronto.edu!cs.utexas.edu!uwm.edu!zaphod.mps.ohio-state.edu!sdd.hp.com!spool.mu.edu!uunet!ogicse!hsdndev!husc6!husc9!ehsu From: ehsu@husc9.harvard.edu (Eric Hsu) Newsgroups: comp.sys.apple2 Subject: Re: ASIC-65816 News Message-ID: <5544@husc6.harvard.edu> Date: 31 Jan 91 16:19:04 GMT References: <1991Jan30.202122.22109@ux1.cso.uiuc.edu> <9242@uwm.edu> <1991Jan31.065813.25807@nntp-server.caltech.edu> <5542@husc6.harvard.edu> Sender: news@husc6.harvard.edu Reply-To: ehsu@husc9.UUCP (Eric Hsu) Organization: Harvard University Science Center Cambridge, MA Lines: 24 In article <1991Jan31.065813.25807@nntp-server.caltech.edu> toddpw@nntp-server.caltech.edu (Todd P. Whitesel) writes: >mcgu5464@csd4.csd.uwm.edu (Ronald J Mcguire) writes: > >>And then what? A THIRD brand of accellerator? Hmmm... Besides, the price > >And then Zip and AE buy from Fadell instead of WDC and we get faster, more >reliable accelerators for a reasonable price. I'm really glad this project is going through... but as far as the price goes, it seems like a big problem might be fast memory. To really run at 25 MHz, wouldn't you need something like 40 ns RAM?? It might be kind of expensive. I guess you could have a small cache of on-chip fast RAM. Also, what are the chances of someone making a //e accelerator out of an ASIC 65816? Greater than Zero, I hope. >Todd Whitesel >toddpw @ tybalt.caltech.edu Eric Hsu ehsu@husc4.Bitnet, ehsu@husc9.harvard.edu Eric Hsu ehsu@husc4.Bitnet, ehsu@husc9.harvard.edu