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From: tmh@keks.FOKUS.GMD.DBP.DE (Thomas Hoberg)
Newsgroups: comp.unix.sysv386
Subject: Re: ISA bus limitations (Re: binary Mach distribution for 386)
Message-ID: <296@bigfoot.first.gmd.de>
Date: 30 Jan 91 12:45:04 GMT
References: <1991Jan4.140341.11874@granite.cr.bull.com> <1991Jan16.031210.24626@informix.com> <1991Jan16.185851.2419@ico.isc.com>
Sender: news@bigfoot.first.gmd.de
Reply-To: tmh@keks.FOKUS.GMD.DBP.DE (Thomas Hoberg)
Organization: Gesellschaft fuer Mathematik und Datenverarbeitung (GMD)
Lines: 26


In article <1991Jan16.185851.2419@ico.isc.com>, rcd@ico.isc.com (Dick
Dunn) writes:
|> > You wouldn't think the ISA bus was so nifty if you were trying to do
|> > DMA over it (or use memory-mapped devices) on an ISA-bus machine with 
|> > over 16MB of memory on it...  
|> 
|> That's definitely a problem...although it really focuses on the DMA
|> controllers (wretched devices for various reasons) more than the I/O bus.
|> Somewhere along the way to moving memory off the ISA bus, someone should
|> have come up with a better DMA controller that also had a way to get to
|> more memory.
|> -- 
Nobody (but the floppy) really uses those wretched devices. These so called
bus mastering controllers just pull the DREQ lines to get the CPU off the bus.
The DMA they do themselves. But no DMA controller, however smart, can
circumvent the fact that there are only 24 address lines on the ISA bus.
|> Dick Dunn     rcd@ico.isc.com -or- ico!rcd       Boulder, CO   (303)449-2870
|>    ...Mr. Natural says, "Use the right tool for the job."
----
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