Path: utzoo!utgpu!news-server.csri.toronto.edu!cs.utexas.edu!uunet!virtech!cpcahil
From: cpcahil@virtech.uucp (Conor P. Cahill)
Newsgroups: comp.unix.sysv386
Subject: Re: ISA bus limitations (Re: binary Mach distribution for 386)
Message-ID: <1991Jan31.010126.23088@virtech.uucp>
Date: 31 Jan 91 01:01:26 GMT
References: <1991Jan4.140341.11874@granite.cr.bull.com> <1991Jan16.031210.24626@informix.com> <1991Jan16.185851.2419@ico.isc.com> <296@bigfoot.first.gmd.de>
Reply-To: cpcahil@virtech.UUCP (Conor P. Cahill)
Organization: Virtual Technologies Inc., Sterling VA
Lines: 21

In article <296@bigfoot.first.gmd.de> tmh@keks.FOKUS.GMD.DBP.DE (Thomas Hoberg) writes:
>
>In article <1991Jan16.185851.2419@ico.isc.com>, rcd@ico.isc.com (Dick
>Dunn) writes:
>|> Somewhere along the way to moving memory off the ISA bus, someone should
>|> have come up with a better DMA controller that also had a way to get to
>|> more memory.
>|> -- 
>But no DMA controller, however smart, can
>circumvent the fact that there are only 24 address lines on the ISA bus.

The address lines on the ISA bus don't matter in this case because most, 
if not all, 386 systems provide a second 32-bit memory bus for system 
memory.  It *should* be possible to find a DMA controller that will allow
you to move data from an ISA card to a 32 bit memory address.


-- 
Conor P. Cahill            (703)430-9247        Virtual Technologies, Inc.
uunet!virtech!cpcahil                           46030 Manekin Plaza, Suite 160
                                                Sterling, VA 22170