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From: jlitvin@st860.intel.com (John Litvin)
Newsgroups: comp.arch
Subject: Re: Vector processors, i860
Message-ID: <JLITVIN.91Feb6121003@st860.intel.com>
Date: 6 Feb 91 20:10:03 GMT
References: <798@nvuxl.UUCP> <1991Feb3.061217.21988@watdragon.waterloo.edu>
	<538@decvax.decvax.dec.com.UUCP>
Sender: news@inews.intel.com
Organization: Software Technologies, Intel Corporation, Santa Clara, CA
Lines: 22
In-reply-to: kenton@abyss.zk3.dec.com's message of 6 Feb 91 13:38:26 GMT

In article <538@decvax.decvax.dec.com.UUCP> kenton@abyss.zk3.dec.com (Jeff Kenton OSG/UEG) writes:

   In article <1991Feb3.061217.21988@watdragon.waterloo.edu>,
   ccplumb@rose.uwaterloo.ca (Colin Plumb) writes:
   |> hsong@nvuxl.UUCP (g hugh song) wrote:
   |> > Why is it so hard to build a UNIX machine with Intel's i860 chip?  What is
   |> > missing in this chip for building a UNIX machine out of this chip?
   |> 
   |> Return from interrupt.  When the chip takes an exception, it sort of
   |> drops all the bits in the pipleine on the floor and lets software
   |> put the pieces back together.  The code to restart from an interrupt
   |> is, I'm told, 10,000 lines of assembler.
   |> 

>   I don't believe this number.  It clearly takes some work, but I would guess
>   it's more on the order of 100 - 200 instructions.  Anyone know?

Yes, I do :-).  From the SVR4 port, we have about 1000 lines of assembly
in ml/ttrap.s to handle this.  (OK, it's more than 200, but far less than
the 10,000 lines we were accused of requiring).

John Litvin