Path: utzoo!attcan!uunet!wuarchive!zaphod.mps.ohio-state.edu!mips!sgi!rpw3@rigden.wpd.sgi.com
From: rpw3@rigden.wpd.sgi.com (Rob Warnock)
Newsgroups: comp.arch
Subject: Re: The Future of Buses (and Futurebus+)
Message-ID: <81036@sgi.sgi.com>
Date: 14 Jan 91 07:38:33 GMT
References: <38005@cup.portal.com>
Sender: guest@sgi.sgi.com
Reply-To: rpw3@sgi.com (Rob Warnock)
Organization: Silicon Graphics, Inc., Mountain View, CA
Lines: 27

In article <38005@cup.portal.com> mmm@cup.portal.com
(Mark Robert Thorson) writes [with significant editing by me]:
+---------------
| ...  Standard buses will be used for talking to high-bandwidth peripherals,
| and for these purposes the features of Futurebus+ are overkill.
| So what is the argument for Futurebus+? ... Or is there some other
| technological development... which will make the Futurebus+ model popular?
+---------------

The first thing that comes to my mind is that no existing standard bus has
the capacity to handle the "high-bandwidth peripherals" of tomorrow, and even
Futurebus+ may not be "overkill". Consider HiPPI (100 or 200 Mbyte/sec),
SONET (up to 3 Gbit/s), live video, and things we haven't thought of yet.

If the very notion of "third-party vendors" is to survive, we are going to
need a new "standard" place for their products to plug in. (No, I don't believe
every presently existing PC peripheral had been anticipated by the time the
PC bus design was frozen.)


-Rob

-----
Rob Warnock, MS-9U/515		rpw3@sgi.com		rpw3@pei.com
Silicon Graphics, Inc.		(415)335-1673		Protocol Engines, Inc.
2011 N. Shoreline Blvd.
Mountain View, CA  94039-7311