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From: huck@aspen.IAG.HP.COM (Jerry Huck)
Newsgroups: comp.arch
Subject: Re: Segmented machines and per process memory limits.
Message-ID: <1360007@aspen.IAG.HP.COM>
Date: 8 Feb 91 23:14:31 GMT
References: <9101312359.AA07832@ucbvax.Berkeley.EDU>
Organization: HP Information Architecture Group - Cupertino, CA
Lines: 41

>From: jlol@REMUS.EE.BYU.EDU (Jay Lawlor)
>Anyway, what we're wondering is whether other 'super workstations'
>like the new MIPS server, HP's soon to be announced "snake" line, etc.
>are going to have similar limitations.  It seems like IBM has pulled
>another "nobody will ever need more than 64k segments" trick on us.
>
>Anyone care to comment on what limitations various machines have?

PA-RISC machines have 32 bit offsets that can be used as 4 or less
segments but that is a software convention.  The current data size
limitations are (like AIX) a function of the OS.  On HP-UX, the
current release limits the static data to something around 700Mbytes
(with I imagine many caveats about swap space and system
configuration).  This restriction has nothing to do with "segments"
rather it has to do with investment priorities.  Shared data segments
come from another 700-800Mb region.  All of this is abstracted from the user
and can be changed by subsequent releases of the OS.

Another of HP's operating systems (MPE/XL), use the full 64 bit
address space to support mapped files.  In that environment, processes
can address more than 2^32 bytes at a time.  An important destinction
from the RS6000 architecture is ability of the process, on PA-RISC, to
address more than 2^32 bytes, using 64 bit pointers, without OS
involvement.  The only restriction is that address computations do not
automatically carry out of the low 32 bits.  Nothing prevents HP-UX or
OSF based OS's from supporting 64-bit pointers.


>                       This is very similar to what all sane UNIX
>implementations do on the 80386 and 80486. Of course you would think that
>by now hardware designers would get the message that portable OS'es do not
>use segmentation hardware and hence putting it on the chip is a waste.
>...
>Zalman Stern, MIPS Computer Systems, 928 E. Arques 1-03, Sunnyvale, CA 94086
>zalman@mips.com OR {ames,decwrl,prls,pyramid}!mips!zalman     (408) 524 8395

What do you mean here?  

Jerry Huck (huck@iag.hp.com)
Hewlett-Packard
Information Architecture Group