Path: utzoo!utgpu!news-server.csri.toronto.edu!cs.utexas.edu!rice!uw-beaver!cornell!rochester!pt.cs.cmu.edu!gandalf.cs.cmu.edu!lindsay From: lindsay@gandalf.cs.cmu.edu (Donald Lindsay) Newsgroups: comp.arch Subject: Re: Segmented machines and per process memory limits. Message-ID: <11871@pt.cs.cmu.edu> Date: 9 Feb 91 19:42:27 GMT References: <9101312359.AA07832@ucbvax.Berkeley.EDU> <1360007@aspen.IAG.HP.COM> Organization: Carnegie Mellon Robotics Institute, School of CS Lines: 20 In article <1360007@aspen.IAG.HP.COM> huck@aspen.IAG.HP.COM (Jerry Huck) writes: [Zalman Stern, MIPS Computer Systems,writes:] >>Of course you would think that >>by now hardware designers would get the message that portable OS'es do not >>use segmentation hardware and hence putting it on the chip is a waste. > >What do you mean here? I think he means that the IBM RS6000 and the HP-PA would have been better architectures if they had just gone with flat 32-bit address spaces, and left off the segmentation features. I agree with him. As far as I can tell, the resulting systems aren't noticeably better than systems using 32 bits + good software. If marketing phrases such as "52 bit address" or "64 bit address" promise something extra - power, or software simplicity - then these segmentation schemes don't really deliver. -- Don D.C.Lindsay .. temporarily at Carnegie Mellon Robotics