Path: utzoo!mnetor!tmsoft!torsqnt!news-server.csri.toronto.edu!bonnie.concordia.ca!uunet!wuarchive!zaphod.mps.ohio-state.edu!pacific.mps.ohio-state.edu!linac!att!emory!hubcap!Pasi.Koikkalainen From: Pasi.Koikkalainen@lut.fi (Pasi Koikkalainen) Newsgroups: comp.parallel Subject: Re: iWARP and neural nets Message-ID: <12938@hubcap.clemson.edu> Date: 6 Feb 91 09:19:36 GMT References: <12929@hubcap.clemson.edu> Sender: fpst@hubcap.clemson.edu Organization: Lappeenranta University of Technology, Finland Lines: 48 Approved: parallel@hubcap.clemson.edu zenith@ensmp.fr (Steven Ericsson Zenith) writes about iWARP: >I'd say this type of processor does not at all encroache on the realm of >fine-grained neural networks, for pretty much the same reason the >transputer doesn't. When you talk about Neural Net silicon you need >something closer to a memory device, not a CPU. Look out > "Analog VLSI and Neural Systems" by Carver Mead, > published by Addison-Wesley. 1989 Yes, all this is true, but it's only one way of looking the problem. I agree that neural networks should be seen and specified as low level, massively parallel, architectures but any simulation experiment is not practical without a model architecture which allows the description of the neural network to be given in a structured environment. Such a framework also makes it possible to use MIMD type of multiprocessors (or multicomputers) for artificial neural computing. In the fact the idea of coarse-grained computing adapts quite nicely to neural networks. The basic computing unit is then a layer of neurons, a slab (Hecht Nielsen), or any other similar groupping of neurons. One must also remember that every application of neural networks requires a system level design, where several networks are competing or co-operating. There is not much hope that we really can produce neural systems by using VLSI at this point. The requirement of the silicon space is too much. So parallel computing is the next best alternative. See for example: Ghosh J. and Hwang K., Mapping Neural Networks onto Message-Passing Multicomputers, Journal of Parallel and Distributed Computing, 6, 1989, pp. 291-330. Also I have one paper to appear (manuscrpit is from 1989): Koikkalainen P. and Oja E.,The Carelia simulator: A Development and Specification Environment for Neural Networks Advances in Control Networks and Large Scale Parallel Distributed Prosessing Models, Ablex, NJ, 1991. A good motivation for a model architecture is also given in: Hecht-Nielsen H. Neurocomputing, Reading, MA: Addison-Wesley Publishing Company. 1990. -- +-- Pasi Koikkalainen; Lappeenranta University of Technology +-- P.O.Box 20, 53851 LPR, Finland; Phone: +358 53 5743434 +-- e-mail: pako@neuronstar.it.lut.fi or koikkalainen@ltkka.lut.fi