Path: utzoo!utgpu!news-server.csri.toronto.edu!cs.utexas.edu!uunet!crdgw1!crdos1!davidsen
From: davidsen@crdos1.crd.ge.COM (Wm E Davidsen Jr)
Newsgroups: comp.arch
Subject: Re: A Fast Memory Architecture
Message-ID: <3187@crdos1.crd.ge.COM>
Date: 11 Feb 91 16:33:56 GMT
References: <2012@cluster.cs.su.oz.au> <1991Feb10.013525.1317@zoo.toronto.edu> <11878@pt.cs.cmu.edu>
Reply-To: davidsen@crdos1.crd.ge.com (bill davidsen)
Organization: GE Corp R&D Center, Schenectady NY
Lines: 21

In article <11878@pt.cs.cmu.edu> agn@unh.cs.cmu.edu (Andreas Nowatzyk) writes:

| Second, by 1 organizations become too cumbersome: consider a 64bit SIMM
| with 16 Mbit chips: "Sorry, but 128 Mbytes IS our smallest SIMM" :-)

  What's your point? 

  If there's a market for something smaller vedors will sell SIMMs with
1mbit, or 256k, or even 64k if there's a demand. I guess I can't
imagine a machine with a 64 bit path which couldn't use a 128MB part.

  Cost is certainly not going to be a big deal, like any other part the
price will come down until it is related to actual cost. And honestly I
don't see production cost being large for any chip of any complexity, at
least in comparison to the development cost. Look at the prices of
memory five years ago, and today. I would expect $10/MB in 1-2 years,
with 4MB bing the usual unit of expansion.
-- 
bill davidsen	(davidsen@crdos1.crd.GE.COM -or- uunet!crdgw1!crdos1!davidsen)
  "I'll come home in one of two ways, the big parade or in a body bag.
   I prefer the former but I'll take the latter" -Sgt Marco Rodrigez