Path: utzoo!utgpu!news-server.csri.toronto.edu!cs.utexas.edu!sun-barr!lll-winken!elroy.jpl.nasa.gov!swrinde!zaphod.mps.ohio-state.edu!wuarchive!udel!rochester!pt.cs.cmu.edu!wolfe From: wolfe@vw.ece.cmu.edu (Andrew Wolfe) Newsgroups: comp.arch Subject: Re: R4000 Message-ID: Date: 12 Feb 91 20:32:57 GMT References: <45448@mips.mips.COM> <1991Feb1.223326.18683@watdragon.waterloo.edu> <45525@mips.mips.COM> <45791@mips.mips.COM> Organization: Carnegie Mellon University Lines: 22 In-reply-to: mash@mips.COM's message of 11 Feb 91 21:25:07 GMT Aha! As an purist I must insist that the R4000 is NOT Superpipelined. I believe the term is defined by Jouppi (IEEE TC Dec. 1989) - A superpipelined machine must have a multistage ALU. This defines the critical distinguishing characteristic of Superpipelined machines - Independence between sucessive ALU operations (Unless hardware stalls are used). The R4000 is an interesting heavily pipelined machine - but not Superpipelined. The pipeline stages are just defined differently than in a traditional RISC architecture. (I would expect that this is the correct pipelining solution for todays technology - I only object to the use of the term Superpipelined - marketing hype)