Path: utzoo!utgpu!news-server.csri.toronto.edu!bonnie.concordia.ca!uunet!mcsun!ukc!ox-prg!prg.ox.ac.uk!as From: as@prg.ox.ac.uk (Andrew Stevens) Newsgroups: comp.sys.acorn Subject: MEMC and video DMA question Message-ID: <1277@culhua.prg.ox.ac.uk> Date: 14 Feb 91 13:03:49 GMT Sender: news@prg.ox.ac.uk Reply-To: as@prg.ox.ac.uk (Andrew Stevens) Organization: Oxford University Computing Laboratory, UK Lines: 36 A question to the knowledgeable: The recent comments on speeding up Arch's when using big modes reminds me of something that has puzzled me for some time about the Arch architecture: In a basic Arch you get contention between the video-subsystem and the CPU - the MEMC multiplexes the two onto the same memory sub-system. It even generates the video-DMA addresses as I understand it. So, what happends in a machine with 2 or more MEMC's? Can you fix things up so that RAM controlled by one MEMC supports video DMA (and runs slow), whilst a second bank with its own MEMC runs at full tilt. In an A540, for example, does the machine run faster when more than one RAM bank is added? Also, does MEMC support general-purpose DMA as well as video? E.g. for winchesters etc, or is all that sort of stuff (as I heard rumoured) done by the main CPU? The latter would at least partially explain the reputedly poor through-put of Rxy0 UNIX systems when paging. A 32K page size certainly doesn't help, but it shouldn't impact through-put all that much. If the system isn't thrashing other runnable processes should happily soak up CPU time while a page-fault is fixed. However, if the CPU was *busy* during page-faults sluggish performance during paging would be no suprise at all. Andrew Andrew Stevens Programmming Research Group JANET: Andrew.Stevens@uk.ac.oxford.prg Oxford University Computing Laboratory INTERNET: Andrew.Stevens@prg.ox.ac.uk 11 Keble Road, Oxford, England UUCP: ...!uunet!mcvax!ukc!ox-prg!as