Path: utzoo!utgpu!news-server.csri.toronto.edu!cs.utexas.edu!sdd.hp.com!ucsd!ucrmath!koufax!rhyde From: rhyde@koufax.ucr.edu (randy hyde) Newsgroups: comp.sys.apple2 Subject: Re: My decision for the LC Message-ID: <12052@ucrmath.ucr.edu> Date: 16 Feb 91 01:59:06 GMT References: <9102132324.AA00480@apple.com> <1991Feb14.111611.26037@nntp-server.caltech.edu> Sender: news@ucrmath.ucr.edu Reply-To: rhyde@koufax.ucr.edu (randy hyde) Lines: 103 Todd, there must be *NO* making you happy! >>>>> The bus architecture of the 65816 prefers a small and tight instruction set, whereas the bus scheme of the 680x0 prefers a larger and more powerful instruction set. <<<<< Gee, that's the first time in my life I've ever heard anyone claim that a "bus" prefers one instruction set over another. Now I can understand how a cpu with large (3-8 byte) instructions might execute faster on a 32-bit bus (over an eight-bit bus), but "prefers"? It is true that the 6502 cpu was optimized for an eight-bit bus. The pipelining is such that a three-byte instruction needs three cycles for loading, decoding, and execution (plus any cycles associated with accessing memory). There are very few "dead bus" cycles on the 6502. From this standpoint I guess you could claim that the 6502's instruction set "prefers" an eight-bit bus. Mainly because going to a larger bus would not improve the efficiency any. Note that this discussion does *NOT* apply overall to the 65816 since there are many instructions which exhibit dead bus cycles. However, this "preference" is a *bad* thing! It means that going to a 16 or 32-bit bus would provide very little in the way of performance improvement! It still takes 4 cycles to execute LDA $1000 (in eight-bit mode) on an eight-bit bus as it would on a 32-bit bus. After discussing this with Mr. Mensch, He led me to believe a 16-bit access would still take 5 cycles, even on a 16-bit bus. This is lousy microcode design. When I put together the 65c820 article, I assumed that such a chip would be designed by people who were up to the job. We've learned a lot about squeezing the most out of CPU cycles since the 6502 was designed back in 1975 (or whenever). The classic example is National's 32764 chip (which, apparently, is real). This chip is the epitome of CISC yet it executes most instructions in about one or two cycles (I haven't seen the actual timings, this is what National claimed it would do in earlier papers). True, the 65c820 chip required larger instructions. The 65c816 uses 255 of the available 256 eight-bit opcodes. The only way to increase the size of the instruction set is to go to larger opcodes (anyone taking an undergraduate architecture class can tell you this). Kludges like the M & X bits in the processor flags aren't practical for the type of instruciton set I envisioned. Of course my "chip" would deliver lousy performance on an eight-bit bus. The instructions, on the average would have to be about twice as long as 65c816 instructions (even for those instructions which do exactly the same thing). This, of course, means it would take twice as long to fetch the instructions across an eight-bit bus. I solved this problem two ways: (1) I designed the instruction set so that it would take fewer than half the instructions to accomplish the same thing. (2) I would use a 32-bit bus (allowing me to fetch twice as many instructions in the same time period). Overall, the chip, using modern design techniques, could run much faster than an equivalently clocked 65c816. Of course the whole discussion is a moot point since this chip will never exist. But since my design "disgusts" you, why don't *YOU* write an article describing something which is better. Normally, I try to hold personal flames down a bit, but your constant flaming on the net has pushed even the patience of Job. You keep claiming the GS can do so many wonderful things. There are those of us who don't believe you. Quite honestly, the only way you're going to convince us otherwise is to actually write the code. In other words, "put up or shut up." I know the Apple II GS can support an assembler which assembles at the rate of over 100,000 lines per minute (2.8 Mhz), Brian Fitzgerald and I wrote such a product (LISA 816). You claim a decent compiler can be written for the GS. I've yet to see it. Perhaps it's theoretically possibly. But one drawback to the 65816 is that this is so hard to do that no one has done it (and will probably never, ever do it, either). Prove me wrong. Prove a good compiler can be written, write it! If you don't have time, I doubt anyone else will have the time either. Perhaps it can be done. But if it takes so much time to do this that no one ever does, it may as well be impossible for all the Apple II GS owners are concerned. That's the beauty of a design like the 65c820-- it would make it possible to write a decent compiler for the chip. And it would be easy to do so. Therefore, someone would actually do it. As for PascalIIGS, I have every intention of ordering this for my Mac II. However, "good" code generation is a very relative term. I suspect (and I could be quite wrong on this) that it doesn't come close to producing the same code quality that compilers for 80x86, 680x0, and 32x32 compilers produce. Oh, it may do all the neat optimizations (which, as it turns out, rarely do more than double the speed of an *AVERAGE* program), but I'll but it's still relatively lousy code (compared to a straight assembly language program). Todd, I love reading the flames around here. But you should try to hold the personal attacks, especially the unwarranted ones, down to a minimum. I hate to get defensive about this, but gee, I *AM* defensive about it. It's one thing to blast me for telling the the GS is obsolete and everyone really should` consider switching to a Mac; it's another thing to call my work disgusting. You will notice that nowhere (other than the implication in this statement) in this article did I blast you personally concerning some rather ignorant statements you made. I know several people who read this conference quite a bit and they all know your name. They do not hold a very high opinion of you. I'm positive the same could be said about me. However, after reading your attacks on everyone around here I came to the conclusion that "gee, I probably sound just as bad as Todd." You will notice I've knocked off flaming the "truly ignorant" around here lately. I suspect this conference would be much better if *WE* all stop the personal attacks around here.