Path: utzoo!mnetor!tmsoft!torsqnt!news-server.csri.toronto.edu!bonnie.concordia.ca!ccu.umanitoba.ca!herald.usask.ca!alberta!ubc-cs!uw-beaver!milton!ogicse!emory!samsung!sdd.hp.com!elroy.jpl.nasa.gov!jato!news From: harry@neuron6.Jpl.Nasa.Gov (Harry Langenbacher) Newsgroups: comp.ai.neural-nets Subject: Re: Analog VLSI design tools for neural nets Keywords: analog VLSI, neural nets Message-ID: <1991Feb15.172244.21721@jato.jpl.nasa.gov> Date: 15 Feb 91 17:22:44 GMT References: <1522@fs1.ee.ubc.ca> Sender: news@jato.jpl.nasa.gov Organization: Jet Propulsion Laboratory, Pasadena, CA Lines: 25 Nntp-Posting-Host: neuron6.jpl.nasa.gov In article <1522@fs1.ee.ubc.ca> kpl@fs0.ee.ubc.ca (k. p. Lam) writes: >I am looking for information >on available (both public domain or commercial) CAD tools for designing >analog VLSI circuits for neural nets. Carver Mead's book seems to indicate >that some powerful design packages are now available in the field -- but >I wonder whether someone in the newsgroup have more details on their >sources and availability. We have designed many analog VLSI chips with MAGIC, both versions 4 and 6. It is Public domain. We simulate our circuits with Pspice - a comercial version of the public domain SPICE from U.C. Berkeley. We also use some rather expensive layout checking software. Our chips are made by MOSIS. Carver Mead's students have written an a complete set of cad tools and assembled it into a succesful cad system at Cal Tech. I don't think it's available to the public yet. It includes tools for schematic capture, circuit simulation, I.C. layout, and design verification. Just come on down and enroll. With Magic and Spice, and some carefull checking - you're in business. -- Harry Langenbacher 818-354-9513 harry%neuron6@jpl-mil.jpl.nasa.gov Neuroprocessing & Analog Computing Devices JPL, M/S 302-231, 4800 Oak Grove Dr, Pasadena CA 91109