Path: utzoo!attcan!uunet!snorkelwacker.mit.edu!bloom-picayune.mit.edu!athena.mit.edu!jfc From: jfc@athena.mit.edu (John F Carr) Newsgroups: comp.arch Subject: Re: Real Time/Cache Message-ID: <1991Jan31.194036.19148@athena.mit.edu> Date: 31 Jan 91 19:40:36 GMT References: <17999@cbmvax.commodore.com> <14118@ganymede.inmos.co.uk> Sender: news@athena.mit.edu (News system) Organization: Massachusetts Institute of Technology Lines: 15 In article gessel@masada.cs.swarthmore.edu (Daniel Mark Gessel) writes: >I just wondered why processors are designed with a cache instead of >using these kinds of memory chips. I have always just assumed it was >expense. I would guess that it is harder to make a fast data path to main memory than to a small on-chip memory. The choice then becomes whether to make the fast memory a cache or not. For most applications (probably not including real time) it is better to let the hardware take care of copying frequently accessed memory locations into the fast memory. -- John Carr (jfc@athena.mit.edu)