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From: sss@ole.UUCP (Stephen Sugiyama)
Newsgroups: comp.lsi
Subject: Re: Volume chip costs.
Keywords: MOSIS TinyChip masks wafer
Message-ID: <1813@ole.UUCP>
Date: 16 Feb 91 22:30:48 GMT
References: <1991Feb14.103845.20434@news.iastate.edu> <16774@venera.isi.edu> <1991Feb15.115859.8285@news.iastate.edu>
Reply-To: sss@ole.UUCP (Stephen Sugiyama)
Distribution: usa
Organization: Seattle Silicon Corporation, Bellevue, WA.
Lines: 17

In article <1991Feb15.115859.8285@news.iastate.edu> mpurtell@iastate.edu (Purtell Michael J) writes:
> I just toured our Microelectronics Research Center(ISU) yesterday and 
> was shown a mask for a chip.  The mask only had one chip on it; not a whole
> wafer's worth of replicates.  Is this just the way it's done in a research
> environment?
> -- 
>                    Michael Purtell ---- mpurtell@iastate.edu

You probably saw a reticle for a stepper.  Both full-wafer (1:1) projection
masks and reduction step-and-repeat projection reticles (usually 5X) are
common in optical lithography.  Stepping is becoming more prevalent since
the resolution can be greater, larger wafers can be imaged, and there is a
slightly higher tolerance to mask defects, at a cost of slower throughput.
Sometimes both systems are used in a process for different projection steps.
-- 
Stephen Sugiyama
ole!sss@sumax.seattleu.edu