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From: eckert@immd4.informatik.uni-erlangen.de (Toerless Eckert)
Newsgroups: comp.protocols.tcp-ip
Subject: Re: TCP/IP over X25
Message-ID: <1991Feb17.163237.17152@informatik.uni-erlangen.de>
Date: 17 Feb 91 16:32:37 GMT
References: <1991Feb15.235715.21152@Think.COM>
Distribution: comp.protocols.tcp-ip, comp.sys.dec, comp.sys.sun, comp.sys.hp
Organization: CSD., University of Erlangen, Germany
Lines: 39

From article <1991Feb15.235715.21152@Think.COM>, by barmar@think.com (Barry Margolin):
- SunLink X.25 implements RFC877 for SunOS.  The manual mentions one minor
- difference between its implementation and the RFC, though.  Rather than
- creating and clearing X.25 virtual circuits dynamically, they must be
- created and cleared explicitly by using the x25enable and x25disable
- commands.
- 
->What is the maximum speed that is supported by such a product ? Most
->kernels donot support very high speeds. Ultrix for instance does not
->allow 19Kb or higher. Sun and HP do allow 19Kb transfer rates !
- 
- According to the manual, 19.2Kbps is the maximum speed using the CPU board
- serial ports, but you can go up to 64Kbps using an MCP or SCP.

Real life experience: Sun3/50: 9.6kbps, Sun3/xx(other than 3/50): 19.2kbps,
Sun4/xxx: 64kbps - all over CPU ports. MCP ports 64kbps each, HSI 2Mbps.

The timing for asynchronuous operation is normally irrelevant for
HDLC, as the clock will normally be generated by the modem. Even if generated
by the Sun itself, the timing does not depend on the usual baud rate
table for the asynchronuous interfaces, so it's no problem running the
interfaces at higher speeds. The real problem is overrun, as all the
CPU board serial interfaces generate one interrupt for every 'character'
(i.e: 8 bit), so that's why a 3/50 can only achieve 9.600kbps. If you
try something higher, you'll get massive problems with HDLC RESETS, as
the interface looses interrupts and the HDLC link will constantly
reset.

On the other hand, the MCP board is (in my opinion) quite useless as 
the guaranteed linkrate is only 64kbps, which you can aesily achieve
with the CPU ports of every sparc (except those cripled IPC's, if you
don't start soldering on the CPU board for the clock lines ;-)).

---

             Toerless.Eckert@informatik.uni-erlangen.de
    /C=de/A=dbp/P=uni-erlangen/OU=informatik/S=Eckert/G=Toerless
"unsupported configuration", "user misunderstanding", "not a bug, but a feature"
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