Path: utzoo!utgpu!news-server.csri.toronto.edu!bonnie.concordia.ca!uunet!cs.utexas.edu!sun-barr!rutgers!cbmvax!daveh
From: daveh@cbmvax.commodore.com (Dave Haynie)
Newsgroups: comp.sys.amiga.hardware
Subject: Re: Bridgeboard questions...
Message-ID: <19082@cbmvax.commodore.com>
Date: 18 Feb 91 17:28:51 GMT
References: <1991Feb14.034710.11646@mintaka.lcs.mit.edu> <18991@cbmvax.commodore.com> <1991Feb16.044402.12664@mintaka.lcs.mit.edu>
Reply-To: daveh@cbmvax.commodore.com (Dave Haynie)
Organization: Commodore, West Chester, PA
Lines: 37

In article <1991Feb16.044402.12664@mintaka.lcs.mit.edu> blf@churchy.ai.mit.edu (Bill Frandsen) writes:
>In article <18991@cbmvax.commodore.com> drysdale@cbmvax.commodore.com (Scott Drysdale) writes:

>>the problem with the cmi-bridgeboard combo is probably the way the cmi
>>handles the TAS instruction (a supposedly forbidden instruction in the
>>amiga in general, but the janus 2.0 and earlier stuff uses it).  

>BTW-If "TAS" is forbidden, why is a Commodore product using it?  Doesn't
>that go against the whole idea of following the programming rules?

The only proper use of TAS is for bus locking of memory in a shared memory
coprocessor type environment.  In other words, just what you have with a 
Bridge Board and its shared memory.  TAS can't reliably be used on arbitrary
chunks of memory; Chip RAM and most Zorro II memory cards don't support it,
because of the weird, special case 68000 cycle TAS generates on the 68000.
Since Bridge Board memory was designed with TAS in mind, it can support the
TAS instruction.

However, it probably shouldn't anyway, and I think they're eliminating it in
the future.  Most accelerator cards don't generate a proper bus lock for TAS.
Most 68020/68030 cards will generate two separate unlocked cycles.  The A3000
will generate a real TAS read-modify-write cycle, but it may vary by a clock
or so from what the 68000 does, based on synchronizations between the 68030
and 7MHz clock.  I don't what a fast 68000 would do.  

In general, the 68000 TAS cycle was a good idea with a very poor 
implementation.  I wouldn't recommend it for use on any Zorro II system, since
you can't guarantee it'll generate a bus lock at best, or that it'll work at 
all at worst.  Use a software spin-lock or similar to arbitrate for a semaphore
that does the actual locking of any shared structures.  TAS, CAS, and CAS2 can
be used on Zorro III boards just fine.  They won't lock Chip RAM on any system,
though you don't need bus locking between Agnus and the CPU anyway.

-- 
Dave Haynie Commodore-Amiga (Amiga 3000) "The Crew That Never Rests"
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	"What works for me might work for you"	-Jimmy Buffett